VLSI System Design Methodology

COE 465 - VLSI System Design Methodology (3-0-3)

CMOS VLSI system design options; Full-custom and semicustom designs. Design flows of ASICs; front-end and back-end design flows. Design & verification CAD tools. Chip Layout, place and route, and design rules checking. Concepts and tools in floor planning, placement and routing, layout generation and design synthesis. The course stresses hands-on experience of VLSI design using CAD tools.

Pre-requisites: COE302